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Digital electronics based on silicon (Si) semiconductors is the fundamentals of modern society, and further development is necessary in the future. However, miniaturization of semiconductor device, which is the guiding principle of performance improvement, has reached its essential limit. Once miniaturization is completed, performance will improve by only 3% per year. Furthermore, a significant increase in the energy consumption of semiconductor devices due to a rapid increase in the amount of information communication is an urgent issue on a global scale. Therefore, tungsten diselenide (WSe2), which has no dangling bonds and exhibits high mobility of electrons and holes exceeding that of Si even with a single molecular layer and ambipolar conduction, has attracted much attention as a semiconductor to replace Si. The purpose of this study is to establish the device technology of WSe2 CMOSFET and to realize digital electronics with high energy efficiency by ultra-low voltage operation. By independently establishing source/drain technology with alloy and compound metals and self-aligned gate stack technology, a CMOS inverter gain of 15 at low voltage 0.5V operation will be demonstrated.

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Asst. Prof. Takamasa Kawanago（Quantum Nanoelectronics Research Center）